ADSP-21160M/ADSP-21160N
Three-State Timing—Bus Master, Bus Slave
See Table 25 and Figure 22. These specifications show how the
memory interface is disabled (stops driving) or enabled
(resumes driving) relative to CLKIN and the SBTS pin. This
timing is applicable to bus master transition cycles (BTC) and
host transition cycles (HTC) as well as the SBTS pin.
Table 25. Three-State Timing—Bus Master, Bus Slave
Parameter
Timing Requirements
tSTSCK
tHTSCK
SBTS Setup Before CLKIN
SBTS Hold After CLKIN1
Min
Max
6
2
Switching Characteristics
tMIENA
tMIENS
tMIENHG
tMITRA
tMITRS
tMITRHG
tDATEN
tDATTR
tACKEN
tACKTR
tCDCEN
tCDCTR
tATRHBG
tSTRHBG
tPTRHBG
tBTRHBG
tMENHBG
Address/Select Enable After CLKIN
Strobes Enable After CLKIN2
HBG Enable After CLKIN
Address/Select Disable After CLKIN3
Strobes Disable After CLKIN2, 4, 5
HBG Disable After CLKIN6
Data Enable After CLKIN7, 8
Data Disable After CLKIN7, 9
ACK Enable After CLKIN7
ACK Disable After CLKIN7
CLKOUT Enable After CLKIN10
CLKOUT Disable After CLKIN
Address, MSx Disable Before HBG Low11
RDx, WRx, DMAGx Disable Before HBG Low11
Page Disable Before HBG Low11
BMS Disable Before HBG Low11
Memory Interface Enable After HBG High12, 13
1.5
1.5
1.5
0.5
0.25tCCLK – 4
0.5
0.25tCCLK + 1
0.5
1.5
1.5
0.5
tCCLK – 3
1.5tCK – 6
tCK + 0.25tCCLK – 6
tCK – 6
0.5tCK – 6.5
tCK – 5
1 For ADSP-21160M, specification is 1 ns, minimum.
2 Strobes = RDx, WRx, and DMAGx.
3 For ADSP-21160M, specification is 0.25tCCLK–1 ns (minimum) and 0.25tCCLK+4 ns (maximum).
4 If access aborted by SBTS, then strobes disable before CLKIN [0.25tCCLK + 1.5 (min.), 0.25tCCLK + 5 (max.)]
5 For ADSP-21160M, specification is 0.25tCCLK ns (maximum).
6 For ADSP-21160M, specification is 3.5 ns (minimum).
7 In addition to bus master transition cycles, these specs also apply to bus master and bus slave synchronous read/write.
8 For ADSP-21160M, specification is 1.5 ns (minimum) and 10 ns (maximum).
9 For ADSP-21160M, specification is 1.5 ns (minimum).
10For ADSP-21160M, specification is 0.5 ns (minimum).
11Not specified for ADSP-21160M.
12Memory Interface = Address, RDx, WRx, MSx, PAGE, DMAGx, and BMS (in EPROM boot mode).
13For ADSP-21160M, specification is tCK+5 ns (maximum).
9
9
9
9
0.25tCCLK+1.5
8
0.25tCCLK + 7
5
9
5
9
tCCLK + 1
1.5tCK + 5
tCK + 0.25tCCLK + 5
tCK + 5
0.5tCK + 1.5
tCK + 6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. C | Page 37 of 60 | February 2013