ADSP-2141L View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

ADSP-2141L

Safe Net® DSP

Analog Devices 

1 2 3 4 5 6 7 8 9 10 Next

ADSP-2141L

Pin Name

# of Input/

Pins Output Function

Flags

PF6:0

PF7/INT_H

7

I/O

1

I/O

Programmable I/O Pins

Programmable I/O Pin–or–Interrupt Output (Host Mode)

Emulator

EE

EBR

EBG

ERESET

EMS

EINT

ECLK

ELIN

ELOUT

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

1

(Emulator Only)

Serial EEPROM Interface

EE_DI

1

O

EE_DO

1

I

EE_CS

1

O

EE_SK

1

O

Serial EEPROM Data In

Serial EEPROM Data Out

Serial EEPROM Chip Select

Serial EEPROM Clock

Bus Select

BUS_MODE

BUS_SEL

1

I

1

I

Processor Bus Select

Bus Select

PCI Bus (Dedicated Pins)

PCI_CLK

1

I

PCI_PAR

1

I/O

PCI_IRDY

1

I/O

PCI_STOP

1

I/O

PCI Clock

PCI Parity Bit

PCI Initiator Ready

PCI Abort Transfer

*When DMS is enabled for generation of CMS, the CMS is activated for DSP access to external memory only, NOT for DMA controller accesses.

Bus Mode Descriptions

The Pin Function Descriptions, Bus Mode table, shows the multiplexed pins in 2183 and PCI mode. For more information on the

PCI pins MPLX1–MPLX12, see the Pin Functions Description–PCI Mode Multiplex Bus table on the following page.

Bus Mode

MPLX_RESET

MPLX1

MPLX2

MPLX3

MPLX4

MPLX5

MPLX6

MPLX7

MPLX8

MPLX9

MPLX10

MPLX11

MPLX12

MPLX_BUS[31:0]

Power

GND

VDD

Total:

# of

Pins

1

1

1

1

1

1

1

1

1

1

1

1

1

32

PIN FUNCTION DESCRIPTIONS—Bus Mode

Input/

Output

I

I/O

I/O

I/O

I/O

I

I

I/O

I/O

I/O

I/O

I/O

O

I/O

2183 Mode

(bus_mode = 0, bus_sel = 0)

RESET_1

IRD

IWR

IS

IAL

IACK

FL0

FL1

FL2

IAD15:0

N/C 31:16

PCI Mode

(bus_mode = 1, bus_sel = 0)

Pci_rst

Pci_cbe3

Pci_cbe2

Pci_cbe1

Pci_cbe0

Pci_idsel

Pci_gnt

Pci_frame

Pci_devsel

Pci_trdy

Pci_perr

Pci_serr

Pci_req

Pci_ad15:0

Pci_ad31:16

24

–

Ground Pins

22

–

Power Supply Pins (3.3 V)

208 Includes the pins from this table and the I/O Hardware Pin Function Description table.

–10–

REV. 0

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