ADSP-21469 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21469' PDF : 76 Pages View PDF
ADSP-21467/ADSP-21469
ELECTRICAL CHARACTERISTICS
450 MHz
400 MHz
Parameter1
VOH2
VOL2
VOH_DDR2
VOL_DDR2
IIH4, 5
IIL4, 6
IILPU5
IIHPD6
IOZH7, 8
IOZL7, 9
IOZLPU8
IOZHPD9
IDD_INT10
IDD_A11
CIN12, 13
Description
Test Conditions
Min
High Level Output
Voltage
Low Level Output
Voltage
@ VDD_EXT = Min, IOH = –1.0 mA3 2.4
@ VDD_EXT = Min, IOL = 1.0 mA3
High Level Output @ VDD_DDR = Min, IOH = –13.4 mA 1.4
Voltage for DDR2
Low Level Output @ VDD_DDR = Min, IOL = 13.4 mA
Voltage for DDR2
High Level Input
Current
@ VDD_EXT = Max,
VIN = VDD_EXT Max
Low Level Input
Current
@ VDD_EXT = Max, VIN = 0 V
Low Level Input
Current Pull-up
@ VDD_EXT = Max, VIN = 0 V
High Level Input @ VDD_EXT = Max,
Current Pull-down VIN = VDD_EXT Max
Three-State Leakage @ VDD_EXT/VDD_DDR = Max,
Current
VIN = VDD_EXT/VDD_DDR Max
Three-State Leakage @ VDD_EXT/VDD_DDR = Max,
Current
VIN = 0 V
Three-State Leakage @ VDD_EXT = Max, VIN = 0 V
Current Pull-up
Three-State Leakage @ VDD_EXT = Max,
Current Pull-down VIN = VDD_EXT Max
Supply Current
(Internal)
fCCLK > 0 MHz
Supply Current
(Analog)
VDD_A = Max
Input Capacitance TCASE = 25°C
Max
Min
2.4
0.4
1.4
0.29
10
10
200
200
10
10
200
200
Table 13 +
Table 14 × ASF
10
5
Max
Unit
V
0.4
V
V
0.29
V
10
μA
10
μA
200
μA
200
μA
10
μA
10
μA
200
μA
200
μA
Table 13 + mA
Table 14 × ASF
10
mA
5
pF
1 Specifications subject to change without notice.
2 Applies to output and bidirectional pins: AMI_ADDR23-0, AMI_DATA7-0, AMI_RD, AMI_WR, FLAG3–0, DAI_Px, DPI_Px, EMU, TDO.
3 See Output Drive Currents on Page 62 for typical drive current capabilities.
4 Applies to input pins: BOOTCFGx, CLKCFGx, TCK, RESET, CLKIN.
5 Applies to input pins with internal pull-ups: TRST, TMS, TDI.
6 Applies to input pins with internal pull-downs: MLBCLK
7 Applies to three-statable pins: all DDR2 pins.
8 Applies to three-statable pins with pull-ups: DAI_Px, DPI_Px, EMU.
9 Applies to three-statable pins with pull-downs: MLBDAT, MLBSIG, MLBDO, MLBSO, LDAT07-0, LDAT17-0, LCLK0, LCLK1, LACK0, LACK1.
10See Engineer-to-Engineer Note EE-348 “Estimating Power Dissipation for ADSP-214xx SHARC Processors” for further information.
11Characterized but not tested.
12Applies to all signal pins.
13Guaranteed, but not tested.
Rev. B | Page 20 of 76 | March 2013
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