ADSP-21467/ADSP-21469
Table 41. Serial Ports—External Late Frame Sync
Parameter
Min
Switching Characteristics
tDDTLFSE1
Data Delay from Late External Transmit Frame Sync or External
Receive Frame Sync with MCE = 1, MFD = 0
tDDTENFS1
Data Enable for MCE = 1, MFD = 0
0.5
1 The tDDTLFSE and tDDTENFS parameters apply to left-justified as well as DSP serial mode, and MCE = 1, MFD = 0.
Max
7.75
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
DRIVE
EXTERNAL RECEIVE FS WITH MCE = 1, MFD = 0
SAMPLE
DRIVE
tSFSE/I
tHFSE/I
tDDTENFS
tHDTE/I
1ST BIT
tDDTE/I
tDDTLFSE
DRIVE
LATE EXTERNAL TRANSMIT FS
SAMPLE
DRIVE
tSFSE/I
tHFSE/I
tDDTENFS
tHDTE/I
1ST BIT
tDDTE/I
tDDTLFSE
Figure 29. External Late Frame Sync
2ND BIT
2ND BIT
Unit
ns
ns
Rev. B | Page 46 of 76 | March 2013