ADV7189B
The following registers are located in the Common I2C Map and Register Access Page 1.
Table 86. Common and Normal (Page 1) Register Map Details
Subaddress
0x00
Register
Input
Control
Bit Description
INSEL[3:0]. The INSEL bits allow the
user to select an input channel as
well as the input format.
76
VID_SEL[3:0]. The VID_SEL bits
allow the user to select the input
video standard.
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
Bits
5 43
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
2 1 0 Comments
0 0 0 CVBS in on AIN1
0 0 1 CVBS in on AIN2
0 1 0 CVBS in on AIN3
0 1 1 CVBS in on AIN4
1 0 0 CVBS in on AIN5
1 0 1 CVBS in on AIN6
1 1 0 Y on AIN1, C on AIN4
1 1 1 Y on AIN2, C on AIN5
0 0 0 Y on AIN3, C on AIN6
0 0 1 Y on AIN1, Pb on AIN4, Pr
on AIN5
0 1 0 Y on AIN2, Pb on AIN3, Pr
on AIN6
0 1 1 CVBS in on AIN7
1 0 0 CVBS in on AIN8
1 0 1 CVBS in on AIN9
1 1 0 CVBS in on AIN10
1 1 1 CVBS in on AIN11
Auto-detect PAL (BGHID),
NTSC J (without pedestal),
SECAM
Auto-detect PAL (BGHID),
NTSC M (with pedestal),
SECAM
Auto-detect PAL (N), NTSC
J, SECAM (PAL with
pedestal)
Auto-detect PAL (N), NTSC
M, SECAM (PAL and NTSC
with pedestal)
NTSC(J)
NTSC(M)
PAL 60
NTSC 4.43
PAL BGHID
PAL N (BGHID without
pedestal)
PAL M (without pedestal)
PAL M
PAL combination N
PAL combination N
SECAM (with pedestal)
SECAM (with pedestal)
Notes
Composite
S-Video
YPbPr
Composite
Rev. B | Page 72 of 104