ADV7189B View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADV7189B' PDF : 104 Pages View PDF
ADV7189B
Subaddress
0x34
0x35
0x36
0x37
Register
HS Position
Control 1
HS Position
Control 2
HS Position
Control 3
Polarity
Bit Description
HSE[10:8]. HS end allows the
positioning of the HS output within
the video line.
Reserved
HSB[10:8]. HS begin allows the
positioning of the HS output within
the video line.
Reserved
HSB[7:0] See above, using
HSB[10:0] and HSE[10:0], the user
can program the position and
length of HS output signal.
HSE[7:0] See above.
PCLK. Sets the polarity of LLC1.
Reserved
PF. Sets the FIELD polarity.
Reserved
PVS. Sets the VS polarity.
Reserved
PHS. Sets HS polarity.
76
0
0
00
00
0
0
Bits
5 43
0
00
0 00
0 00
0
1
0
0
1
2 1 0 Comments
0 0 0 HS output ends HSE[10:0]
pixels after the falling
edge of Hsync
Set to 0
HS output starts HSB[10:0]
pixels after the falling
edge of Hsync
Set to 0
010
000
0 Invert polarity
1 Normal polarity as per
timing diagrams
00
Set to 0
Active high
Active low
Set to 0
Active high
Active low
Set to 0
Active high
Notes
Using HSB and HSE
the user can program
the position and
length of the output
Hsync
1
Active low
Rev. B | Page 80 of 104
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