AN2125 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'AN2125' PDF : 68 Pages View PDF
uPSD3300 Series Design Guide for DK3300-ELCD Using KEIL
Project.sum
This report generated by PSDsoft provides a Summary of the whole project and has useful in-
formation. Some of it also available in Fitter report.
***********************************************************************
PSDsoft Express Version 8.30
Summary of Design Assistant
***********************************************************************
PROJECT : project
DATE : 01/18/2005
DEVICE : uPSD3334D
TIME : 18:10:17
MCU/DSP : uPSD33XX
***********************************************************************
Initial setting for Program and Data Space:
===========================================
Main PSD flash memory will reside in this space at power-up:
Program Space Only
Secondary PSD flash memory will reside in this space at power-up: Data Space Only
Pin Definitions:
================
Pin
Signal
Pin
Name
Name
Type
------------ ------------------------- ------------
pa7
pa7
Peripheral I/O mode
pa6
pa6
Peripheral I/O mode
pa5
pa5
Peripheral I/O mode
pa4
pa4
Peripheral I/O mode
pa3
pa3
Peripheral I/O mode
pa2
pa2
Peripheral I/O mode
pa1
pa1
Peripheral I/O mode
pa0
pa0
Peripheral I/O mode
pb7
pb7
GP I/O mode
pb6
En_EA
Logic or address
pb5
En_EB
Logic or address
pb4
LCD_E2
External chip select - Active Hi
pb3
LCD_E1
External chip select - Active Hi
pb2
LCD_RW
Combinatorial
pb1
LCD_A0
Combinatorial
tdo
tdo
Dedicated JTAG - TDO
tdi
tdi
Dedicated JTAG - TDI
pc4
_terr
Dedicated JTAG - /TERR
pc3
tstat
Dedicated JTAG - TSTAT
tck
tck
Dedicated JTAG - TCK
tms
tms
Dedicated JTAG - TMS
pd2
pd2
GP I/O mode
pd1
pd1
GP I/O mode
ale
ale
ALE output
_psen
_psen
Bus control output
_rd
_rd
Bus control output
_wr
_wr
Bus control output
a11
a11
Address line
a10
a10
Address line
a9
a9
Address line
a8
a8
Address line
ad7
a7
Data/Address line
ad6
a6
Data/Address line
ad5
a5
Data/Address line
ad4
a4
Data/Address line
ad3
a3
Data/Address line
ad2
a2
Data/Address line
ad1
a1
Data/Address line
ad0
a0
Data/Address line
debug
JTAG_debug_pin
JTAG debug pin
Xtal1
Xtal1
Xtal1
Xtal2
Xtal2
Xtal2
_Reset_In _Reset_In
Reset In
Vref
VREF
VREF input
User defined nodes:
===================
Node
Node
Name
Type
------------ ------------
En_counter0 D-type register
En_PA
D-type register
En_PB
D-type register
65/68
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