AS4LC8M8S0
AS4LC4M16S0
®
Interleaved bank read waveform
(BL = 4, CL = 3, Autoprecharge)
CLK
CS
RAS
CAS
tRC
tRAS
tRC
tRP
tRAS
tRAS
tRP
tRC
tRC
tRP
tRAS
tRAS
WE
BA0/BA1† Bank
Bank Bank
Bank
Bank
Bank
A0–A9, A11
tRCD
RAa
tRCD
RAb
tRCD
RAc
Bank
Bank
tRCD
RAd
Bank
RAe
A10
RAa
CAa RAb
CBb
RAc
CBc
DQM
CKE
tRRD
DQ
tRRD
QAa0 QAa1 QAa2 QAa3
tRRD
QBb0 QBb1 QBb2 QBb3
Bank A
Active Read
AP
Active
Read
Bank B
Active
Read
AP
†BA0 and BA1 together determine which bank undergoes operations. AP = internal precharge begins.
RAd
CBd
RAe
tRRD
QAa0 QAa1 QAa2 QAa3
AP
Active
Read
QBb0 QBb1 QBb2
Active
Interleaved bank read waveform
CLK
(BL = 8, CL = 3)
CS
RAS
CAS
tRC
tRAS
tRP
tRP
tRAS
tRC
tRC
tRAS
tRP
WE
BA0/BA1† Bank
Bank Bank
A10
tRCD
RAa
Bank
Bank
Bank
tRCD
RBb
Bank
Bank Bank
tRCD
RAc
A0–A9, A11 RAa
CAa
DQM
RBb
CBb
RAc
CAc
CKE
DQ
Bank A
Active Read
QAa0 QAa1 QAa2 QAa3 QAa4 QAa5 QAa6 QBb0 QBb1
Precharge
Active
Bank B
Precharge Active Read
†BA0 and BA1 together determine which bank undergoes operations.
QBb4 QBb5 QBb6 QBb7
Read
QAc0
QAc1
Precharge
7/5/00
ALLIANCE SEMICONDUCTOR
21