AT45DB080-RC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT45DB080-RC' PDF : 18 Pages View PDF
Read Operations
The following block diagram and waveforms illustrate the various read sequences available.
FLASH MEMORY ARRAY
PAGE (264 BYTES)
MAIN MEMORY
PAGE TO
BUFFER 1
BUFFER 1 (264 BYTES)
BUFFER 1
READ
MAIN MEMORY
PAGE TO
BUFFER 2
BUFFER 2 (264 BYTES)
MAIN MEMORY
PAGE READ
BUFFER 2
READ
I/O INTERFACE
I/O7-I/O0 (OUTPUT)
Main Memory Page Read
CS
I/O7-I/O0
(INPUT)
I/O7-I/O0
(OUTPUT)
CMD
r r r, PA11-7 PA6-0, BA8
BA7-0
X
X
X
X
ADDR
ADDR
ADDR
n
n+1
Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer)
CS
I/O7-I/O0
(INPUT)
I/O7-I/O0
(OUTPUT)
Starts reading page data into buffer
CMD
r r r, PA11-7 PA6-0, X
X
ADDR
ADDR
ADDR
Buffer Read
CS
I/O7-I/O0
(INPUT)
I/O7-I/O0
(OUTPUT)
CMD
X
X···X, BFA8 BFA7-0
X
ADDR ADDR
ADDR
n
n+1
Each transition represents
8 bits and 1 clock cycle
n = 1st byte written
n+1 = 2nd byte written
10
AT45DB080
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