AT45DB080-TC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT45DB080-TC' PDF : 18 Pages View PDF
Reset Timing (Inactive Clock Polarity Low Shown)
CS
SCK
RESET
SO
HIGH IMPEDANCE
SI
tREC
tRST
tCSS
HIGH IMPEDANCE
Command Sequence for Read/Write Operations (Except Status Register Read)
I/O7-I/O0
(INPUT)
CMD ADDR ADDR ADDR
MSB
r r r X XXXX XXXX XXXX XXXX XXXX
Reserved for
larger densities
Page Address
(PA11-PA0)
Byte/Buffer Address
(BA8-BA0/BFA8-BFA0)
LSB
Notes: 1. “r” designates bits reserved for larger densities.
2. It is recommended that “r” be a logical “0” for densities of 8M bit or smaller.
3. For densities larger than 8M bit, the “r” bits become the most significant Page Address bit for the appropriate density.
8
AT45DB080
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