AT45DB321C View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT45DB321C' PDF : 40 Pages View PDF
Table 10-4. AC Characteristics – Serial Interface
Symbol
Parameter
Min
Typ
Max
Units
fSCK(1)
fCAR(1)
SCK Frequency
SCK Frequency for Continuous Array Read
40
MHz
40
MHz
tWH
SCK High Time
10
ns
tWL
SCK Low Time
10
ns
tCS
Minimum CS High Time
250
ns
tCSS
CS Setup Time
100
ns
tCSH
CS Hold Time
250
ns
tCSB
CS High to RDY/BUSY Low
150
ns
tSU
Data In Setup Time
3
ns
tH
Data In Hold Time
6
ns
tHO
Output Hold Time
0
ns
tDIS
Output Disable Time
10
ns
tV
Output Valid
12
ns
tXFR
tEP(2)(3)
tP(2)(3)
tPE(2)(3)
tBE(2)(3)
Page to Buffer Transfer/Compare Time
Page Erase and Programming Time
Page Programming Time
Page Erase Time
Block Erase Time
350
µs
16
50
ms
8
15
ms
8
35
ms
20
100
ms
tRST
RESET Pulse Width
10
µs
tREC
RESET Recovery Time
1
µs
tWPE
WP Low to Protection Enabled
1
µs
tWPD
WP High to Protection Disabled
Note: 1. Maximum specified frequency for SPI compatibility is 33 MHz.
1
µs
2. The device uses an adaptive algorithm during program and erase operations. Use the RDY/BUSY bit of the status register or
the RDY/BUSY pin to determine whether the program or erase operation has completed. Fixed timing should not be used.
3. Value are based on device characterization, not 100% tested in production.
22 AT45DB321C
3387M–DFLASH–2/08
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