AT80C32X2 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT80C32X2' PDF : 55 Pages View PDF
Power-off Flag
TS8xCx2X2
The power-off flag allows the user to distinguish between a “cold start” reset and a
“warm start” reset.
A cold start reset is the one induced by VCC switch-on. A warm start reset occurs while
VCC is still applied to the device and could be generated for example by an exit from
power-down.
The power-off flag (POF) is located in PCON register (See Table 17.). POF is set by
hardware when VCC rises from 0 to its nominal voltage. The POF can be set or cleared
by software allowing the user to determine the type of reset.
The POF value is only relevant with a Vcc range from 4.5V to 5.5V. For lower Vcc value,
reading POF bit will return indeterminate value.
Table 17. PCON Register
PCON - Power Control Register (87h)
7
6
5
4
3
2
1
0
SMOD1 SMOD0
-
POF
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic Description
7
SMOD1
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
6
SMOD0 Clear to select SM0 bit in SCON register.
Set to to select FE bit in SCON register.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-off Flag
4
POF
Clear to recognize next reset type.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be
set by software.
General purpose Flag
3
GF1
Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
2
GF0
Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-down mode bit
1
PD
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
0
IDL
Clear by hardware when interrupt or reset occurs.
Set to enter idle mode.
Reset Value = 00X1 0000b
Not bit addressable
29
4184I–8051–02/08
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