AT88SC102-09ET-XX-2.7 View Datasheet(PDF) - Unspecified

Part Name

Description

MFG CO.

AT88SC102-09ET-XX-2.7

1K EEPROM– Security Logic with Two Application Zones

Unspecified 

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AT88SC102

Figure 18-7. Erase Operation Application Zone 2 (AZ2), EC2 Function Disabled

Reset

Read

Compare EZ2

(A)

Erase

(B)

Address Ax

A0

A1

A2

A735

A736 A737

A766

A767

A768

RST

CLK

Read

(C)

(D)

A769

I/O

DX

D0

D1

Output

PGM

CD736

CD737

Input

CD767

Input

Output

1

Input

D768

Output

E2 flag

Notes:

1. An = Internal Address, Dn = Read data (output), CDn = Compare data (input).

2. This diagram illustrates the protocol for setting the E2 flag in Security Level 2 (issuer fuse blown). Erase operations in Secu-

rity Level 1 within Application Zone 2 do not require setting of the E2 flag. In Security Level 1, an erase operation on any bit

in Application Zone 2 will erase the entire 16-bit word containing the bit.

3. EC2EN Fuse - “0” (disabled).

A = Compare sequence of EZ2. If the comparison is valid, the EZ2 flag is set to “1”, enabling erasure of AZ2.

B = If E2 is set to “1”, an erase operation on Bit 1280 will erase Bits 736–1247 (AZ2) (Security Level 1).

C = After the falling edge of CLK, the device will drive the I/O contact to the logic state of the existing data in Bit 1280. The

state of this bit is not affected by the AZ2 erase operation.

D = After the falling edge of CLK, the address is incremented and the state of the next bit is driven on the I/O contact.

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1419C–SMEM–6/08

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