AT88SC153 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT88SC153' PDF : 24 Pages View PDF
Stop Condition
Acknowledge
Standby Mode
Acknowledge Polling
Device Timing
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence,
the stop command will place the device in a standby power mode (Figure 12 on page
14).
All addresses and data are serially transmitted to and from the device in 8-bit words.
The device sends a “0” to acknowledge that it has received each byte. This happens
during the ninth clock cycle.
The AT88SC153 features a low-power standby mode that is enabled upon power-up
and after the receipt of the stop bit and the completion of any internal operations.
Once the internally-timed write cycle has started and the device inputs are disabled,
acknowledge polling can be initiated. This involves sending a start condition followed by
the command byte representative of the operation desired. Only if the internal write
cycle has completed will the device respond with a “0”, allowing the sequence to
continue.
Figure 12. Start and Stop Definition
Note: The SCL input should be low when the device is idle. Therefore, SCL is low before a start
condition and after a stop condition.
Figure 13. Data Validity
SDA
SCL
DATA STABLE
DATA STABLE
DATA
CHANGE
14 AT88SC153
1016D–SMEM–04/04
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