AT90PWM81 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT90PWM81' PDF : 325 Pages View PDF
AT90PWM81/161
5.5.3
Table 5-10.
CLKPS3
0
0
0
1
1
1
1
1
1
1
1
Clock prescaler select. (Continued)
CLKPS2
CLKPS1
CLKPS0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Clock division factor
32
64
128
256
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PLLCSR - PLL Control and Status Register
Bit
7
6
5
4
3
2
1
0
$29 ($29)
–
–
PLLF3 PLLF2 PLLF1 PLLF0 PLLE
PLOCK PLLCSR
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R
Initial Value
0
0
0
1
0
0
0/1
0
• Bit 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM81/161 and always read as zero.
• Bit 5..2-– PLLF: PLL Factor
The PLLF bits is used to select the multiplication factor of the PLL.
Table 5-11. PLL multiplication factor.
PLLF3..0
N+2
7-F
6
8
5
7
4
6
3
5
2
4
0-1
PLL frequency [MHz]
Reserved
64
56
48
40
32
Reserved
Note: PLLF3 is used for debug purpose (must be wired).
41
7734Q–AVR–02/12
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