PIO Input Filter Enable Register
Register Name:
Access Type:
PIO_IFER
Write only
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0
This register is used to enable input glitch filters. It affects the pin whether or not the PIO is enabled. The register is pro-
grammed as follows:
1 = Enables the glitch filter on the corresponding pin.
0 = No effect.
PIO Input Filter Disable Register
Register Name:
Access Type:
IO_IFDR
Write only
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0
This register is used to disable input glitch filters. It affects the pin whether or not the PIO is enabled. The register is pro-
grammed as follows:
1 = Disables the glitch filter on the corresponding pin.
0 = No effect.
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AT91M40400