AT91SAM9G10-CU View Datasheet(PDF) - Atmel Corporation
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'AT91SAM9G10-CU' PDF : 730 Pages View PDF
AT91SAM9G10
11.2.8
pipeline. If the instruction is not executed, for example because a branch occurs while it is in the
pipeline, the abort does not take place.
The breakpoint (BKPT) instruction is a new feature of ARM9EJ-S that is destined to solve the
problem of the Prefetch Abort. A breakpoint instruction operates as though the instruction
caused a Prefetch Abort.
A breakpoint instruction does not cause the ARM9EJ-S to take the Prefetch Abort exception until
the instruction reaches the Execute stage of the pipeline. If the instruction is not executed, for
example because a branch occurs while it is in the pipeline, the breakpoint does not take place.
ARM Instruction Set Overview
The ARM instruction set is divided into:
• Branch instructions
• Data processing instructions
• Status register transfer instructions
• Load and Store instructions
• Coprocessor instructions
• Exception-generating instructions
ARM instructions can be executed conditionally. Every instruction contains a 4-bit condition
code field (bits[31:28]).
Table 11-2 gives the ARM instruction mnemonic list.
Table 11-2.
Mnemonic
MOV
ADD
SUB
RSB
CMP
TST
AND
EOR
MUL
SMULL
SMLAL
MSR
B
BX
LDR
LDRSH
LDRSB
LDRH
LDRB
ARM Instruction Mnemonic List
Operation
Move
Add
Subtract
Reverse Subtract
Compare
Test
Logical AND
Logical Exclusive OR
Multiply
Sign Long Multiply
Signed Long Multiply
Accumulate
Move to Status Register
Branch
Branch and Exchange
Load Word
Load Signed Halfword
Load Signed Byte
Load Half Word
Load Byte
Mnemonic
MVN
ADC
SBC
RSC
CMN
TEQ
BIC
ORR
MLA
UMULL
UMLAL
MRS
BL
SWI
STR
Operation
Move Not
Add with Carry
Subtract with Carry
Reverse Subtract with Carry
Compare Negated
Test Equivalence
Bit Clear
Logical (inclusive) OR
Multiply Accumulate
Unsigned Long Multiply
Unsigned Long Multiply
Accumulate
Move From Status Register
Branch and Link
Software Interrupt
Store Word
STRH
STRB
Store Half Word
Store Byte
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6462A–ATARM–03-Jun-09
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