ATEMGA128L View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATEMGA128L' PDF : 395 Pages View PDF
Power-on Reset
External Reset
ATmega128
2. VBOT may be below nominal minimum operating voltage for some devices. For
devices where this is the case, the device is tested down to VCC = VBOT during the
production test. This guarantees that a Brown-out Reset will occur before VCC drops
to a voltage where correct operation of the microcontroller is no longer guaranteed.
The test is performed using BODLEVEL=1 for ATmega128L and BODLEVEL=0 for
ATmega128. BODLEVEL=1 is not applicable for ATmega128.
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detec-
tion level is defined in Table 19. The POR is activated whenever VCC is below the
detection level. The POR circuit can be used to trigger the Start-up Reset, as well as to
detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reach-
ing the Power-on Reset threshold voltage invokes the delay counter, which determines
how long the device is kept in RESET after VCC rise. The RESET signal is activated
again, without any delay, when VCC decreases below the detection level.
Figure 23. MCU Start-up, RESET Tied to VCC.
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
Figure 24. MCU Start-up, RESET Extended Externally
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
An External Reset is generated by a low level on the RESET pin. Reset pulses longer
than the minimum pulse width (see Table 19) will generate a reset, even if the clock is
not running. Shorter pulses are not guaranteed to generate a reset. When the applied
signal reaches the Reset Threshold Voltage – VRST on its positive edge, the delay
counter starts the MCU after the Time-out period tTOUT has expired.
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2467O–AVR–10/06
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