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ATF-521P8-BLK View Datasheet(PDF) - Avago Technologies

Part Name
Description
MFG CO.
'ATF-521P8-BLK' PDF : 23 Pages View PDF
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ATF-521P8 Absolute Maximum Ratings [1]
Symbol
Parameter
Units
Absolute
Maximum
VDS
VGS
VGD
IDS
IGS
Pdiss
Pin max.
TCH
TSTG
θch_b
Drain – Source Voltage[2]
Gate­ –Source Voltage[2]
Gate Drain Voltage [2]
Drain Current[2]
Gate Current
Total Power Dissipation[3]
RF Input Power
Channel Temperature
Storage Temperature
Thermal Resistance[4]
V
V
V
mA
mA
W
dBm
°C
°C
°C/W
7
-5 to 1
-5 to 1
500
46
1.5
27
150
-65 to 150
45
Notes:
1. Operation of this device in excess of any one of these parameters may cause permanent damage.
2. Assumes DC quiescent conditions.
3. Board (package belly) temperatureTB is 25°C. Derate 22 mW/°C for TB > 83°C.
4. Channel to board thermal resistance measured using 150°C Liquid Crystal Measurement method.
5. Device can safely handle +27dBm RF Input Power provided IGS is limited to 46mA. IGS at P1dB drive level is bias circuit dependent.
Product Consistency Distribution Charts [5,6]
600
180
0.8V
500
150
400
0.7V
120
300
90
Vgs = 0.6V
200
60
Stdev = 0.19
-3 Std
+3 Std
100
0.5V
0
0
2
0.4V
4
6
VDS (V)
Figure 1. Typical I-V Curves.
(VGS = 0.1 V per step)
30
0
8
0 0.5 1 1.5 2 2.5 3
NF (dB)
Figure 2. NF @ 2 GHz, 4.5 V, 200 mA.
Nominal = 1.5 dB.
150
Cpk = 0.86
Stdev = 1.32
120
90
-3 Std
60
+3 Std
30
0
37 39 41 43 45 47 49
OIP3 (dBm)
Figure 3. OIP3 @ 2 GHz, 4.5 V, 200 mA.
Nominal = 41.9 dBm, LSL = 38.5 dBm.
180
300
Cpk = 2.13
Cpk = 4.6
Stdev = 0.21
Stdev = 0.11
150
250
120
-3 Std
+3 Std
90
200
-3 Std
+3 Std
150
60
100
30
50
0
15
16
17
18
19
GAIN (dB)
Figure 4. Gain @ 2 GHz, 4.5 V, 200 mA.
Nominal = 17.2 dB, LSL = 15.5 dB,
USL = 18.5 dB.
0
25 25.5
26 26.5
P1dB (dBm)
27 27.5
Figure 5. P1dB @ 2 GHz, 4.5 V, 200 mA.
Nominal = 26.5 dBm, LSL = 25 dBm.
Notes:
5. Distribution data sample size is 500 samples taken from 5 different wafers. Future wafers allocated to this product may have nominal values
anywhere between the upper and lower limits.
6. Measurements are made on production test board, which represents a trade-off between optimal OIP3, P1dB and VSWR. Circuit losses have
been de‑embedded from actual measurements.

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