ATF-521P8 View Datasheet(PDF) - HP => Agilent Technologies
Part Name
Description
MFG CO.
ATF-521P8
HP => Agilent Technologies
'ATF-521P8' PDF : 24 Pages View PDF
The second solution is a low pass
configuration with a shunt
capacitor and a series inductor
shown in Figure 5 and 6.
RFin L1
RFout
precipitously giving a narrow
band frequency response, yet still
wide enough to accommodate a
CDMA or WCDMA transmit band.
For more information on RF
matching techniques refer to
MGA-53543 application note.
A voltage divider network with
R1 and R2 establishes the typical
gate bias voltage (Vg).
R1 = Vg
(2)
Ibb p
C1
Figure 5. Low Pass Circuit Topology.
Amp
Frequency
Figure 6. Low Pass Frequency Response.
The actual values of these
components may be calculated by
hand on a Smith Chart or more
accurately done on simulation
software such as ADS. There are
some advantages and disadvan-
tages of choosing a high pass
versus a low pass. For instance, a
high pass circuit cuts off low
frequency gain, which narrows
the usable bandwidth of the
amplifier, but consequently helps
avoid potential low frequency
instability problems. A low pass
match offers a much broader
frequency response, but it has
two major disadvantages. First it
has the potential for low fre-
quency instability, and second it
creates the need for an extra DC
blocking capacitor on the input
in order to isolate the device gate
from the preceding stages.
Figure 7 displays the input and
output matching selected for
ATF-521P8. In this example the
input and output match both
essentially function as high pass
filters, but the high frequency
gain of the device rolls off
Passive Bias [1]
Once the RF matching has been
established, the next step is to
DC bias the device. A passive
biasing example is shown in
Figure 8. In this example the
voltage drop across resistor R3
sets the drain current (Id) and is
calculated by the following
equation:
R3 = Vdd – Vds
(1)
Ids + Ibb p
where,
Vdd is the power supply voltage;
Vds is the device drain to source
voltage;
Ids is the device drain to source
current;
Ibb for DC stability is 10X the
typical gate current;
R2 = (Vdd – Vg) x R1 (3)
Vg
p
Often the series resistor, R4, is
added to enhance the low fre-
quency stability. The complete
passive bias example may be
found in reference [1].
INPUT C1
Q1
Zo
L1 C2
C4 OUTPUT
Zo
L4 C5
R4
C3
R3
Ib
C6
R5
R1
R2
Vdd
Figure 8. Passive Biasing.
RFin C1
Zo
52
C2
C3
Zo
RFout
L1
Input Match
Amp
Amp
+
ATF-521P8
Amp
+
Output Match
Total Response
Amp
=
Frequency
Frequency
Frequency
Frequency
Figure 7. Input and Output Match for ATF-521P8 at 2 GHz.
15
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