ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Prev 71 72 73 74 75 76 77 78 79 80 Next

12.3

Chip Setup

At boot start-up, the processor clock (PCK) and the master clock (MCK) source is the 12 MHz fast RC oscillator.

Initialization follows the steps described below:

1. Stack Setup for ARM Supervisor mode

2. Main Clock Selection: The Master Clock source is switched from the Slow Clock to the Main Oscillator

without prescaler. The PMC Status Register is polled to wait for MCK Ready. PCK and MCK are now the

Main Clock.

3. C Variable Initialization: Non zero-initialized data is initialized in the RAM (copy from ROM to RAM). Zero-

initialized data is set to 0 in the RAM.

4. PLLA Initialization: PLLA is configured to get a PCK at 96 MHz and an MCK at 48 MHz.

12.4 NVM Boot

12.4.1 NVM Boot Sequence

The boot sequence on external memory devices can be controlled using the Boot Sequence Controller

Configuration Register (BSC_CR).

The user can then choose to bypass some steps shown in Figure 12-2 “NVM Bootloader Sequence Diagram”

according to the BOOT value in the BSC_CR.

Table 12-1. Values of the Boot Sequence Controller Configuration Register

BOOT Value

SPI0 NPCS0

SD Card/eMMC SD Card/eMMC

(MCI0)

(MCI1)

8-bit NAND

Flash

0

Y

Y

Y

Y

1

Y

—

Y

Y

2

Y

—

—

Y

3

Y

—

—

—

4

Y

—

—

—

5

—

—

—

—

6

—

—

—

—

7

—

—

—

—

SPI0 NPCS1

Y

Y

Y

Y

Y

—

—

—

SAM-BA

Monitor

Y

Y

Y

Y

Y

Y

Y

Y

SAMA5D4 Series [DATASHEET]

71

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

Share Link: