ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATSAMA5D41A-CU' PDF : 1808 Pages View PDF
Figure 12-4. Remap Action after Download Completion
0x0000_0000
Internal
ROM
REMAP
0x0020_0000
Internal
SRAM
0x0000_0000
Internal
SRAM
0x0020_0000
Internal
SRAM
12.4.3 Valid Code Detection
There are two kinds of valid code detection.
12.4.3.1 ARM Exception Vectors Check
The NVM bootloader program reads and analyzes the first 28 bytes corresponding to the first seven ARM
exception vectors. Except for the sixth vector, these bytes must implement the ARM instructions for either branch
or load PC with PC relative addressing.
Figure 12-5. LDR Opcode
31
28 27
24 23
20 19
16 15
12 11
0
1 1 1 0 0 1 I PU 1W0
Rn
Rd
Offset
Figure 12-6. B Opcode
31
28 27
24 23
0
11101010
Offset (24 bits)
Unconditional instruction: 0xE for bits 31 to 28.
Load PC with the PC relative addressing instruction:
̶ Rn = Rd = PC = 0xF
̶ I==0 (12-bit immediate value)
̶ P==1 (pre-indexed)
̶ U offset added (U==1) or subtracted (U==0)
̶ W==1
74 SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16
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