ATSGA204A View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'ATSGA204A' PDF : 93 Pages View PDF
State Description
Execution Error
After Wake, Prior to First
Command
CRC or other
Communications Error
ATSHA204A
Security Commands
Error/
Status
0x0F
Description
Changes in the value of the command bits must be made before it is
re-attempted.
Command was properly received, but could not be executed by the
device in its current state.
Changes in the device state or the value of the command bits must be
made before it is re-attempted.
0x11
0xFF
Indication that the ATSHA204A has received a proper Wake token.
Command was not properly received by the ATSHA204A and should be
re-transmitted by the I/O driver in the system.
No attempt was made to parse or execute the command.
8.2 Sleep Sequence
Upon completion of system use of the ATSHA204A, the system should issue a sleep sequence to put the
device into low-power mode. Using the I2C interface, this sequence consists of the proper device address
followed by the sleep flag followed by a Stop condition. This transition to the low-power state causes a
complete reset of the device’s internal command engine and input/output buffer. It can be sent to the
device at any time when it is awake and not busy.
8.3 Idle Sequence
If the total sequence of required commands exceeds tWATCHDOG, then the device automatically goes to
sleep and loses any information stored in the volatile registers. This action can be prevented by putting
the device into the idle state prior to completion of the watchdog interval. When the device receives the
Wake token, it then restarts the watchdog timer and execution can be continued.
Using the I2C interface, this idle sequence consists of the proper device address followed by the value of
0x02 as the word address followed by a Stop condition. It can be sent to the device at any time when it is
awake and not busy.
If TempKey was created as a result of the copy mode of the CheckMac command, it will not be retained
when the part goes into an idle state.
8.4 Watchdog Failsafe
A watchdog counter starts within the device after the ATSHA204A receives a Wake token. After
tWATCHDOG, the device enters sleep mode regardless of whether some I/O transmission or command
execution is in progress. There is no way to reset the counter other than to put the device into sleep or
idle mode and then wake it up again.
The watchdog timer is implemented as a failsafe mechanism so that no matter what happens on either
the system side or inside the device, including any I/O synchronization issue, power consumption falls to
the ultra-low sleep level automatically.
The device resets the values stored in the SRAM and internal status registers when it transitions to the
sleep state, however if the device is explicitly put into the idle mode through the appropriate I/O
© 2018 Microchip Technology Inc.
DS40002025A-page 43
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