ATSGA204A View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'ATSGA204A' PDF : 93 Pages View PDF
ATSHA204A
I2C Interface
6.2.1
6.2.2
ATSHA204A
Data
I2C Name
Data1,N
Direction Description
7 of the I2C_Address byte in the Configuration zone. Bit 0 of this byte is
the standard I2C R/W bit and should be zero to indicate a Write
operation (the bytes following the device address travel from the master
to the slave).
To Slave The input block.
Because the device treats the command input buffer as a FIFO, the input block can be sent to the device
in one or many I2C command blocks. The first byte sent to the device is the count, so after the device
receives that number of bytes, it ignores any subsequently received bytes until execution is finished.
The system must send a Stop condition after the last command byte to ensure that the ATSHA204A
starts the computation of the command. Failure to send a Stop condition can eventually result in a loss of
synchronization (See Section I2C Synchronization for recovery procedures).
Word Address Values
During an I2C write packet, the ATSHA204A interprets the second byte sent as the word address, which
indicates the packet function, as described in the table below.
Table 6-2. Word Address Values
Name
Reset
Sleep
(Low Power)
Idle
Command
Reserved
Value
Description
0x00
Reset the address counter. The next read or write transaction starts with the
beginning of the I/O buffer.
0x01
The ATSHA204A goes into the low-power sleep mode and ignores all
subsequent I/O transitions until the next Wake flag. The entire volatile state of
the device is reset.
0x02
The ATSHA204A goes into the idle state and ignores all subsequent I/O
transitions until the next Wake flag. The contents of TempKey and RNG Seed
registers are retained.
0x03
Write subsequent bytes to sequential addresses in the input command buffer
that follow previous writes. This is the normal operation.
0x04 - 0xFF These addresses should not be sent to the device.
Command Completion Polling
After a complete command has been sent to the ATSHA204A, the device will be busy until the command
computation completes. The system has two options for this delay:
• Polling
The system should wait tEXEC (typical) and then send a read sequence (See Section I2C
Transmission from the ATSHA204A Device). If the device NACKs the device address, then it is
still busy. The system may delay for some time or immediately send another read sequence, again
looping on NACK. After a total delay of tEXEC (max), the device will have completed the
computation and can return the results.
• Single Delay
The system should wait tEXEC (max), after which the device will have completed execution and the
result can be read from the device using a normal read sequence.
© 2018 Microchip Technology Inc.
DS40002025A-page 31
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