ATSGA204A View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'ATSGA204A' PDF : 93 Pages View PDF
ATSHA204A
Electrical Characteristics
7.4.1
VIH and VIL Specifications
The input voltage thresholds when in sleep or idle mode are dependent on the VCC level as shown in the
graph in VIH and VIL When in Sleep or Idle Mode.
Figure 7-4. VIH and VIL When in Sleep or Idle Mode
VIH, VIL When in Sleep or Idle Mode
1.60
1.40
1.20
1.00
VIH
VIL
0.80
0.60
0.40
2.0
3.0
4.0
5.0
6.0
VCC
When the device is active (for instance, not in sleep or idle mode), the input voltage thresholds are
different, depending on the state of TTLenable (bit 3) within the I2C_Address byte stored in the
Configuration zone of the EEPROM. When a common voltage is used for the ATSHA204A VCC pin and
the input pull-up resistor, then this bit should be set to a one, which permits the input thresholds to track
the supply as shown in Figure 7-5.
If the voltage supplied to the VCC pin of the ATSHA204A is different from the system voltage to which the
input pull-up resistor is connected, then the system designer may chose to set TTLenable to zero. This
enables a fixed input threshold and the input signal must meet the threshold levels as shown in Table 7-6.
Figure 7-5. VIH and VIL When TTLenable = 1 on All I/O Interfaces
3.20
3.00
2.80
2.60
2.40
2.20
2.00
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
2.0
VIH, VIL when TTLenable is 1
3.0
4.0
5.0
VCC
VIH
VIL
6.0
© 2018 Microchip Technology Inc.
DS40002025A-page 40
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