ATSHA204A
Electrical Characteristics
Table 7-2. AC Parameters — All I/O Interfaces
Parameter
Symbol Direction
Min Typ Max Unit Notes
Wake Low
Duration
tWLO
Power-Up Delay tPU
Wake High
tWHI
Delay to Data
Comm.
To Crypto
60
Authentication
To Crypto
Authentication
100(1)
To Crypto
2.5
Authentication
— μs SDA can be stable in either
high or low levels during
extended sleep intervals.
μs Minimum time between VCC >
VCC min prior to
measurement of tWLO.
ms SDA should be stable high
for this entire duration.
High Side Glitch tHIGNORE_A To Crypto
45
Filter at Active
Authentication
ns Pulses shorter than this in
width are ignored by the
device, regardless of its state
when active.
Low Side Glitch tLIGNORE_A To Crypto
45
Filter at Active
Authentication
ns Pulses shorter than this in
width are ignored by the
device, regardless of its state
when active.
High Side Glitch tHIGNORE_S To Crypto
15
Filter at Sleep
Authentication
μs Pulses shorter than this in
width are ignored by the
device when in sleep mode.
Low Side Glitch tLIGNORE_S To Crypto
Filter at Sleep
Authentication
Watchdog Reset tWATCHDOG To Crypto
Authentication
15
μs
0.7(1) 1.3 1.7 s
Pulses shorter than this in
width are ignored by the
device when in sleep mode.
Max. time from wake until
device is forced into sleep
mode (See Section
Watchdog Failsafe).
Note:
1. These parameters are guaranteed through characterization, but not tested.
© 2018 Microchip Technology Inc.
DS40002025A-page 36