ATXMEGA384D3-MH View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATXMEGA384D3-MH' PDF : 109 Pages View PDF
XMEGA D3
7.7 Flash and EEPROM Page Size
The Flash Program Memory and EEPROM data memory is organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14 shows the Flash Program Memory organization. Flash write and erase
operations are performed on one page at the time, while reading the Flash is done one byte at
the time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant
bits in the address (FPAGE) gives the page number and the least significant address bits
(FWORD) gives the word in the page.
Devices
ATxmega64D3
ATxmega128D3
ATxmega192D3
ATxmega256D3
Table 7-2. Number of words and Pages in the Flash.
Flash
Page Size
FWORD
FPAGE
Application
Size (Bytes)
(words)
Size
No of Pages
64K + 4K
128
Z[7:1]
Z[16:8]
64K
256
128K + 8K
256
Z[8:1]
Z[17:9]
128K
256
192K + 8K
256
Z[8:1]
Z[18:9]
192K
384
256K + 8K
256
Z[8:1]
Z[18:9]
256K
512
Size
4K
8K
8K
8K
Boot
No of Pages
16
16
16
16
Devices
ATxmega64D3
ATxmega128D3
ATxmega192D3
ATxmega256D3
Table 7-3 on page 14 shows EEPROM memory organization for the XMEGA D3 devices.
EEEPROM write and erase operations can be performed one page or one byte at the time, while
reading the EEPROM is done one byte at the time. For EEPROM access the NVM Address
Register (ADDR[m:n] is used for addressing. The most significant bits in the address (E2PAGE)
gives the page number and the least significant address bits (E2BYTE) gives the byte in the
page.
Table 7-3.
EEPROM
Size (Bytes)
2K
2K
2K
4K
Number of bytes and Pages in the EEPROM.
Page Size
E2BYTE
E2PAGE
(Bytes)
32
ADDR[4:0]
ADDR[10:5]
32
ADDR[4:0]
ADDR[10:5]
32
ADDR[4:0]
ADDR[10:5]
32
ADDR[4:0]
ADDR[11:5]
No of Pages
64
64
64
128
14
8134I–AVR–12/10
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