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AU80610006225AASLBXC View Datasheet(PDF) - Intel

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Description
MFG CO.
'AU80610006225AASLBXC' PDF : 80 Pages View PDF
Thermal Specifications and Design Considerations
location on the die, and time based variations in the die temperature measurement.
Time based variations can occur when the sampling rate of the thermal diode (by the
thermal sensor) is slower than the rate at which the TJ temperature can change.
Offset between the thermal diode based temperature reading and the Intel Thermal
Monitor reading may be characterized using the Intel Thermal Monitor’s Automatic
mode activation of the thermal control circuit. This temperature offset must be taken
into account when using the processor thermal diode to implement power management
events. This offset is different than the diode Toffset value programmed into the
processor Model Specific Register (MSR).
Table 7-47 and Table 7-48 provide the diode interface and specifications. Transistor
model parameters shown in Table 7-48 providing more accurate temperature
measurements when the diode ideality factor is closer to the maximum or minimum
limits. Contact your external sensor supplier for their recommendation. The thermal
diode is separate from the Thermal Monitor’s thermal sensor and cannot be used to
predict the behavior of the Thermal Monitor.
Table 7-47.Thermal Diode Interface
Signal Name
Pin/Ball Number
THRMDA_1
THRMDA_2
THRMDC_1
THRMDC_2
D30
C30
E30
D31
Signal Description
Thermal diode anode
Thermal diode anode (for dual-core only)
Thermal diode cathode
Thermal diode cathode (for dual-core only)
Table 7-48.Thermal Diode Parameters using Transistor Model
Symbol
Parameter
Min
Typ Max Unit Notes
IFW
IE
nQ
Beta
RT
Forward Bias Current
Emitter Current
Transistor Ideality
Series Resistance
5
200 μA
1
5
200 μA
1
0.997 1.001 1.015
2,3,4
0.25
0.65
2,3
2.79
4.52 6.24
Ω
2,5
NOTES:
1.
Intel does not support or recommend operation of the thermal diode under reverse bias.
2.
Characterized across a temperature range of 50–100°C.
3.
Not 100% tested. Specified by design characterization.
4.
The ideality factor, nQ, represents the deviation from ideal transistor model behavior as
exemplified by the equation for the collector current:
IC = IS * (e qVBE/nQkT –1)
where IS = saturation current, q = electronic charge, VBE = voltage across the transistor
base emitter junction (same nodes as VD), k = Boltzmann Constant, and T = absolute
temperature (Kelvin).
5.
The series resistance, RT, provided in the Diode Model Table (Table 7-48) can be used for
more accurate readings as needed.
60
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