AU80610006225AASLBXC View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'AU80610006225AASLBXC' PDF : 80 Pages View PDF
Package Mechanical Specifications and Ball Information
Table 8-49.Processor Ball List by Ball Name (Sheet 4 of 9)
Pin Name
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
DPL_REFCLKINN
DPL_REFCLKINP
DPRSTP_B
DPSLP_B
EXP_CLKINN
EXP_CLKINP
EXP_ICOMPI
EXP_RBIAS
EXP_RCOMPO
RSVD_12
RSVD_13
EXTBGREF
FERR_B
GTLREF
HPL_CLKINN
HPL_CLKINP
IGNNE_B
INIT_B
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
RSVD_TP_13
RSVD_TP_2
RSVD_TP_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
Pin
Number
Type
K2
M4
G1
J2
L2
N2
G2
H3
K3
M2
Y29
Y30
G6
G10
N7
N6
L9
L8
L10
R10
R9
K7
H6
A13
W8
W9
E5
G8
L26
L27
L23
AA7
R6
R5
H13
D18
L7
D20
L6
3GIO_CTC_rx
3GIO_CTC_rx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
3GIO_CTC_tx
Display PLL
Display PLL
CPU_sideband
CPU_sideband
3GIO_GFX_clk
3GIO_GFX_clk
3GIO_GFX_ana
3GIO_GFX_ana
3GIO_GFX_ana
CPU_legacy
CPU_sideband
CPU_legacy
Host PLL
Host PLL
CPU_sideband
CPU_sideband
LVDS
LVDS
LVDS
Dir.
I
I
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I/O
I
I
O
I
I
I
I/O
I/O
O
O
I/O
Pin Name
LVD_A_DATAN_2
LVD_A_DATAP_0
LVD_A_DATAP_1
LVD_A_DATAP_2
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDD_EN
RSVD_14
RSVD_15
PRDY_B
PREQ_B
PROCHOT_B
PWROK
RSTINB
RSVD_TP_0
RSVD_TP_1
DDR3_DRAMRST#
RSVD_TP_6
RSVD_TP_7
RSVD_TP_8
RSVD_TP_9
DPL_REFSSCLKINN
DPL_REFSSCLKINP
RSVD_9
RSVD_10
RSVD_11
RSVD_TP_10
RSVD_TP_11
RSVD_TP_12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Pin
Number
R26
R24
N27
R27
R22
J28
N22
N23
H26
J30
K29
E11
F15
C18
L5
AA3
AB11
AB13
AK8
AA21
W21
T21
V21
AA31
AA30
L11
N10
N9
N11
P11
AA6
E27
F21
F22
F25
G19
G21
G24
H17
Type
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
CPU_sideband
CPU_sideband
CPU_legacy
MISC
MISC
Clock for LVDS
Clock for LVDS
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
Dir.
O
O
O
O
I/O
O
I
I
O
I
I
I/O
I/O
I/O
I/O
I
I
I
72
Intel Confidential
EDS - Vol 1
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