AUIR3330S
In input
3. The device can not turn on properly (Vds stay >
0.75v no capacitor reset) but the ON time duration
(duty cycle) is not enough long to charge
completely the capacitor C. So the fault is not
detected by the comparator and it is not latched.
But the picture of energy value dissipated by the
MOSFET during the almost turn on value is stored
in the capacitor C. And at the next pulse the
current generator Igen1 resume to charge the
capacitor until it reach the comparator value and
latch the fault (this sequence could be on several
pulse). It could be reset by a sleep mode.
Vgs voltage
Normal value
Vbat – Voutput voltage
(Vds)
Ed_pch signal
C capacitor
voltage
OVP_Flt
signal
Wake up sequence:
The AUIR3330S has an internal power on reset. After waking it up by the IN signal, the device waits for
Tpwron_rst before activating the output power mosfet. This time is required to charge properly the bootstrap
capacitor and to stabilize the internal power supply (Cf. Error! Reference source not found.).
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May 29, 2014