AV1889Y View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'AV1889Y' PDF : 35 Pages View PDF
ICS1889
QuickPoll Status Register (register 17)
BIT
Definition
15 Data Rate
14 Duplex
When bit = 0
Always a logic one
Half duplex selected
When bit = 1
100 Mbps selected
Full duplex selected
13 Reserved for ICS Read unspecified
12 Reserved for ICS Read unspecified
11 Reserved for ICS Read unspecified
10 Receive Signal Error Signal
Loss of signal
9 PLL Lock Error
PLL locked
PLL failed to lock
8 False Carrier Detect Normal carrier or idle False carrier detected
7 Invalid Symbol
Valid symbols
Invalid symbol detected
6 Halt Symbol
Normal symbols
HALT symbol detected
5 Premature End
Normal stream
Stream with two IDLES
4 Reserved for ICS Read unspecified
3 Reserved for ICS Read unspecified
2 Priority Pin State Hardware
Software
1 Remote Fault
No remote fault detected Remote fault detected
0 Link Status
Link is not valid
Link is valid
Access
RO
RO
RO
RO
RO
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO/LH
RO
RO
RO
RO/LH
RO/LL
Default
1
0 if PRIO=1 or
DPEN if PRIO=0
—
—
—
0
0
0
0
0
0
—
—
PRIO
0
0
QuickPoll Status Register (register 17)
The QuickPoll status register is a 16-bit read only register
used to indicate the comprehensive status of the ICS1889. All
register status bits that might need to be repetitively examined
at run time are located in this register, even though some bits
duplicate functionality from other registers. This allows the
device status to be rapidly obtained with a single register
access.
The register is accessed via the management interface of the
MII. It can always be read and may be written by setting the
override bit in the Configuration Register (register 16, bit 15)
and then performing a write operation. It is initialized during a
power-up or reset to predefined default values.
16
Share Link: 
