C8051F362 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051F362

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

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C8051F360/1/2/3/4/5/6/7/8/9

SFR Definition 8.3. CPT0MD: Comparator0 Mode Selection

SFR Page: all pages

SFR Address: 0x9D

R

R

R/W

R/W

R

–

–

CP0RIE CP0FIE

–

Bit7

Bit6

Bit5

Bit4

Bit3

R

R/W

R/W

Reset Value

–

CP0MD1 CP0MD0 00000010

Bit2

Bit1

Bit0

Bits 7–6: UNUSED. Read = 00b, Write = don’t care.

Bit 5: CP0RIE: Comparator0 Rising-Edge Interrupt Enable.

0: Comparator0 Rising-edge interrupt disabled.

1: Comparator0 Rising-edge interrupt enabled.

Bit 4: CP0FIE: Comparator0 Falling-Edge Interrupt Enable.

0: Comparator0 Falling-edge interrupt disabled.

1: Comparator0 Falling-edge interrupt enabled.

Bits 3–2: UNUSED. Read = 00b, Write = don’t care.

Bits 1–0: CP0MD1–CP0MD0: Comparator0 Mode Select

These bits select the response time for Comparator0.

Mode

0

1

2

3

CP0MD1

0

0

1

1

CP0MD0

0

1

0

1

CP0 Response Time (TYP)

100 ns

175 ns

320 ns

1050 ns

Rev. 1.0

75

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