C8051F901-GD View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F901-GD
Silicon Laboratories
'C8051F901-GD' PDF : 318 Pages View PDF
C8051F91x-C8051F90x
Table 5.1. Representative Conversion Times and Energy Consumption for the SAR
ADC with 1.65 V High-Speed VREF
Normal Power Mode
Low Power Mode
8 bit
10 bit
12 bit
8 bit
10 bit
12 bit
Highest nominal SAR clock
frequency
8.17
MHz
(24.5 / 3)
8.17
MHz
(24.5 /
3)
6.67 MHz
(20.0 / 3)
4.08
4.08
MHz
MHz
(24.5 / 6) (24.5 / 6)
4.00 MHz
(20.0 / 5)
Total number of
52
conversion clocks required
11
13
(13*4)
11
52
13
(13*4)
Total tracking time (min)
1.5 us
4.8 us
1.5 us (1.5+3*1.1)
1.5 us
4.8 us
1.5 us (1.5+3*1.1)
Total time for one
conversion
2.85 us 3.09 us 12.6 us
4.19 us 4.68 us
17.8 us
ADC Throughput
351 ksps
323
ksps
79 ksps 238 ksps 214 ksps 56 ksps
Energy per conversion
8.2 nJ 8.9 nJ
36.5 nJ
6.5 nJ 7.3 nJ
27.7 nJ
Note: This table assumes that the 24.5 MHz precision oscillator is used for 8- and 10-bit modes, and the 20 MHz low
power oscillator is used for 12-bit mode. The values in the table assume that the oscillators run at their
nominal frequencies. The maximum SAR clock values given in Table 4.10 allow for maximum oscillation
frequencies of 25.0 MHz and 22 MHz for the precision and low-power oscillators, respectively, when using the
given SAR clock divider values. Energy calculations are for the ADC subsystem only and do not include CPU
current. Modes in BLUE are only available on 'F912 and 'F902 devices.
68
Rev. 1.0
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