C8051F97X View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F97X' PDF : 455 Pages View PDF
Register 16.3. PMU0FL: Power Management Unit Flag
Bit
7
6
5
4
3
2
1
0
Name
Reserved
I2CWK CS0WK
Type
RW
RW
RW
Reset
0
0
0
0
0
0
X
0
SFR Page = 0x0; SFR Address: 0xCE
Bit
Name
Function
7:2
Reserved Must write reset value.
1
I2CWK I2C0 Slave Wake-up Source Enable and Flag.
Read: Hardware sets this bit to 1 if an I2C0 Slave event occured.
Write: Write this bit to 1 to enable wake-up on an I2C0 Slave event.
0
CS0WK CS0 Wake-up Source Enable and Flag.
Read: Hardware sets this bit to 1 if a Capacitive Sensing comparator threshold event
occured.
Write: Write this bit to 1 to enable wake-up on a Capacitive Sensing comparator thresh-
old event.
Notes:
1. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep mode if any
wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after each wake-up from
Suspend or Sleep modes.
2. PMU0 requires two system clocks to update the wake-up source flags after waking from Suspend mode. The wake-up
source flags will read 0 during the first two system clocks following the wake from Suspend mode.
Rev 1.1
102
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