CC1111F16RSPR View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
Part Name
Description
MFG CO.
CC1111F16RSPR
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
'CC1111F16RSPR' PDF : 240 Pages View PDF
CC1110Fx / CC1111Fx
XDATA
Address
0xDE10
0xDE11
0xDE12
0xDE13
0xDE14
0xDE15
0xDE16
0xDE17
Register
Description
USBMAXI
Max. packet size for IN endpoint
USBCS0
EP0 Control and Status (USBINDEX = 0)
USBCSIL
IN EP{1-5} Control and Status Low
USBCSIH
IN EP{1-5} Control and Status High
USBMAXO Max. packet size for OUT endpoint
USBCSOL OUT EP{1-5} Control and Status Low
USBCSOH OUT EP{1-5} Control and Status High
USBCNT0 Number of received bytes in EP0 FIFO (USBINDEX = 0)
USBCNTL Number of bytes in OUT FIFO Low
USBCNTH Number of bytes in OUT FIFO High
Table 35: Overview of Indexed Endpoint Registers
Valid USBINDEX
Value(s)
1–5
0
1–5
1–5
1–5
1–5
1–5
0
1–5
1–5
XDATA Register
Address
Description
0xDE20 USBF0
Endpoint 0 FIFO
0xDE22 USBF1
Endpoint 1 FIFO
0xDE24 USBF2
Endpoint 2 FIFO
0xDE26 USBF3
Endpoint 3 FIFO
0xDE28 USBF4
Endpoint 4 FIFO
0xDE2A USBF5
Endpoint 5 FIFO
Table 36: Overview of Endpoint FIFO Registers
11.2.4 XDATA Memory Access
The CC1110Fx/CC1111Fx provides an additional
SFR named MPAGE. This register is used
during instructions MOVX A,@Ri and MOVX
@Ri,A. MPAGE gives the 8 most significant
address bits, while the register Ri gives the 8
least significant bits.
MPAGE (0x93) – Memory Page Select
Bit Name
Reset R/W
7:0 MPAGE[7:0]
0x00 R/W
In some 8051 implementations, this type of
XDATA access is performed using P2 to give
the most significant address bits. Existing
software may therefore have to be adapted to
make use of MPAGE instead of P2.
Description
Memory page, high-order bits of address in MOVX instruction
11.2.5 Memory Arbiter
The CC1110Fx/CC1111Fx includes a memory
arbiter which handles CPU and DMA access to
all memory space.
A control register MEMCTR is used to control
the flash cache. The MEMCTR register is
described below.
SWRS033E
Page 53 of 239
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