CC1111F16RSPR View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
Part Name
Description
MFG CO.
CC1111F16RSPR
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
'CC1111F16RSPR' PDF : 240 Pages View PDF
CC1110Fx / CC1111Fx
12.4.4 Flash Programming
Programming of the on-chip flash is performed
via the debug interface. The external host
must initially send instructions using the
DEBUG_INSTR debug command to perform
the flash programming with the Flash
Controller as described in section 13.3.
Command
CHIP_ERASE
WR_CONFIG
RD_CONFIG
GET_PC
READ_STATUS
SET_HW_BRKPNT
HALT
RESUME
DEBUG_INSTR
STEP_INSTR
STEP_REPLACE
GET_CHIP_ID
Instruction Code
Description
0001 0100
Perform flash chip erase (mass erase). The debug interface will be enabled
and no parts of flash will be write-protected after issuing this command. Do
not use any other commands than READ_STATUS utill mass erase has
completed. Return 1 status byte to host
0001 1101
Write configuration data. Return 1 status byte to host. Refer to Table 46 for
details.
0010 0100
Read configuration data. Return value set by WR_CONFIG command
0010 1000
Return value of 16-bit program counter
0011 0100
Read status byte. Refer to Table 47
0011 1011
Set hardware breakpoint
0100 0100
Halt CPU operation. Return 1 status byte to host
0100 1100
Resume CPU operation. To run this command, the CPU must have been
halted. Return 1 status byte to host
0101 01yy
Run debug instruction. The supplied instruction will be executed by the CPU
without incrementing the program counter. To run this command, the CPU
must have been halted. Return 1 status byte to host.
yy: Number of bytes in the CPU instruction (see Table 37). Valid values are
01, 10, and 11
0101 1100
Step CPU instruction. The CPU will execute the next instruction from
program memory and increment the program counter after execution. To run
this command, the CPU must have been halted. Return 1 status byte to host
0110 01 yy
Step and replace CPU instruction. The supplied instruction will be executed
by the CPU instead of the next instruction in program memory. The program
counter will be incremented after execution. To run this command, the CPU
must have been halted. Return 1 status byte to host.
yy: Number of bytes in the CPU instruction (see Table 37). Valid values are
01, 10, and 11
0110 1000
Return value of 16-bit chip ID (PARTNUM:VERSION).
Table 45: Debug Commands
SWRS033E
Page 74 of 239
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