CC1111F32RSP View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

Part Name

Description

MFG CO.

CC1111F32RSP

Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS 

Prev 21 22 23 24 25 26 27 28 29 30 Next

CC1110Fx / CC1111Fx

7.9 Analog Temperature Sensor

TA= 25 °C, VDD = 3.0V if nothing else stated. All measurement results are obtained using the

CC1110EM reference designs ([1]).

Parameter

Min Typ Max Unit Condition/Note

Output voltage at -40 °C

Output voltage at 0 °C

Output voltage at +40 °C

Output voltage at +80 °C

Temperature coefficient

Error in calculated

temperature, calibrated

Current consumption

increase when enabled

0.660

V

0.755

V

0.859

V

0.958

V

2.54

-2 *

0

mV/°C Fitted from -20 °C to +80 °C

2*

°C From –20°C to +80°C when using 2.43 mV / °C, after 1-point

calibration at room temperature

* The indicated minimum and maximum error with 1-point

calibration is based on measured values for typical process

parameters

0.3

mA

Table 17: Analog Temperature Sensor Parameters

7.10 7-12 bit ADC

TA = 25 °C, VDD = 3.0V if nothing else stated. The numbers given here are based on tests performed

in accordance with IEEE Std 1241-2000 [8]. The ADC data are from CC2430 characterization. As the

CC1110Fx/C1111Fx uses the same ADC, the numbers listed in Table 18 should be good indicators of the

performance to be expected from CC1110Fx and CC1111Fx. Note that these numbers will apply for 24

MHz operated systems (like CC1110Fx using a 24 MHz crystal or CC1111Fx using a 48 MHz crystal).

Performance will be slightly different for other crystal frequencies (e.g. 26 MHz and 27 MHz).

Parameter

Input voltage

External reference voltage

External reference voltage

differential

Input resistance, signal

Full-Scale Signal4

ENOB4

Single ended input

ENOB4

Differential input

Useful Power Bandwidth

THD4

-Single ended input

-Differential input

Min Typ

0

0

0

Max

VDD

VDD

VDD

Unit Condition/Note

V VDD is voltage on AVDD pin (2.0 – 3.6 V)

V VDD is voltage on AVDD pin (2.0 – 3.6 V)

V VDD is voltage on AVDD pin (2.0 – 3.6 V)

197

2.97

5.7

7.5

9.3

10.8

6.5

8.3

10.0

11.5

0-20

kΩ Simulated using 4 MHz clock speed (see section

13.10.2.7)

V Peak-to-peak, defines 0 dBFS

bits 7-bits setting

9-bits setting

10-bits setting

12-bits setting

bits 7-bits setting

9-bits setting

10-bits setting

12-bits setting

kHz 7-bits setting, both single and differential

-75.2

-86.6

dB 12-bits setting, -6 dBFS

dB 12-bits setting, -6 dBFS

4 Measured with 300 Hz Sine input and VDD as reference.

SWRS033E

Page 23 of 239

Share Link: