CC1111F32RSPR View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

Part Name

Description

MFG CO.

CC1111F32RSPR

Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS 

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CC1110Fx / CC1111Fx

S0CON (0x98) – CPU Interrupt Flag 2

Bit Name

Reset R/W Description

7:2

0

R/W Not used

1 ENCIF_1

0

0 ENCIF_0

0

R/W AES interrupt. ENCIF has two interrupt flags, ENCIF_1 and ENCIF_0.

Interrupt source sets both ENCIF_1 and ENCIF_0, but setting one of these

flags in SW will generate an interrupt request. Both flags are set when the

AES co-processor requests the interrupt.

0 Interrupt not pending

1 Interrupt pending

R/W AES interrupt. ENCIF has two interrupt flags, ENCIF_1 and ENCIF_0.

Interrupt source sets both ENCIF_1 and ENCIF_0, but setting one of these

flags in SW will generate an interrupt request. Both flags are set when the

AES co-processor requests the interrupt.

0 Interrupt not pending

1 Interrupt pending

S1CON (0x9B) – CPU Interrupt Flag 3

Bit Name

Reset R/W Description

7:6

0

R/W Not used

1 RFIF_1

0 RFIF_0

0

R/W RF general interrupt. RFIF has two interrupt flags, RFIF_1 and RFIF_0.

Interrupt source sets both RFIF_1 and RFIF_0, but setting one of these

flags in SW will generate an interrupt request. Both flags are set when the

radio requests the interrupt.

0 Interrupt not pending

1 Interrupt pending

0

R/W RF general interrupt. RFIF has two interrupt flags, RFIF_1 and RFIF_0.

Interrupt source sets both RFIF_1 and RFIF_0, but setting one of these

flags in SW will generate an interrupt request. Both flags are set when the

radio requests the interrupt.

0 Interrupt not pending

1 Interrupt pending

SWRS033E

Page 67 of 239

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