CC1111F32RSPR View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
Part Name
Description
MFG CO.
CC1111F32RSPR
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
'CC1111F32RSPR' PDF : 240 Pages View PDF
CC1110Fx / CC1111Fx
FCTL (0xAE) – Flash Control
Bit Name
Reset
R/W
7
BUSY
0
R
6
SWBSY
0
R
5
4
CONTRD
R0
R/W
0
3:2
1
WRITE
00
R0
0
R0/W
0
ERASE
0
R0/W
Description
Indicates that write or erase is in operation when set to 1
Indicates that a flash write is in progress. This byte is set to 1 after two bytes
has been written to FWDATA.
Do not write to FWDATA register while this bit is set.
Not used
Continuous read enable
0 Disable. To avoid wasting power, continous read should only be enabled
when needed
1 Enable. Reduces internal switching of read enables, but greatly
increases power consumption.
Not used
When set to 1, a program command used to write data to flash memory is
initiated.
If ERASE is set to 1at the same time as this bit is set to 1, a page erase of the
whole page addressed by FADDRH[6:1] is performed before the write.
This bit will be 0 when returning from PM2 and PM3
Page Erase. Erase page given by FADDRH[5:1].
This bit will be 0 when returning from PM2 and PM3
FWDATA (0xAF) – Flash Write Data
Bit Name
Reset
R/W
Description
7:0 FWDATA[7:0] 0x00
R/W If FCTL.WRITE is set to 1, writing two bytes in a row to this register starts the
actual writing to flash memory. FCTL.SWBSY will be 1 during the actual flash
write
FADDRH (0xAD) – Flash Address High Byte
Bit Name
Reset
R/W
Description
7:6
0
R/W Not used
5:0 FADDRH[5:0] 000000 R/W Page address / High byte of flash word address
Bits 5:1 will select which page to access.
FADDRL (0xAC) – Flash Address Low Byte
Bit Name
Reset
R/W
Description
7:0 FADDRL[7:0] 0x00
R/W Low byte of flash address
FWT (0xAB) – Flash Write Timing
Bit Name
Reset
R/W
7:6
0
R/W
5:0 FWT[5:0]
0x11
R/W
Description
Not used
Flash Write Timing. Controls flash timing generator.
21000 ∗ F
FWT =
, where F is the system clock frequency (see section 13.3.5)
16 *109
SWRS033E
Page 90 of 239
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