CDH2D09 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
'CDH2D09' PDF : 44 Pages View PDF
PMIC with Integrated Charger and
Smart Power Selector for Handheld Devices
TO FIND THE MAXIMUM OUTPUT CURRENT FOR REG3 WITH VIN = 3.2V TO 5.3V, VOUT = 1.2V, L = 4.7μH
±20%, AND RL = 130mΩ :
D = VOUT + IOUTTAR(RN + RL) = 1.2V + 0.425A(0.12Ω + 0.13Ω) = 0.249
VIN + IOUTTAR(RN − RP) 5.3V + 0.425A(0.12Ω − 0.23Ω)
IOUTMAX
=
ILIM −
1+ (RN
VOUT(1− D)
2×f×L
+
RL
)
1−
2×f
D
×L
=
1+
0.555A −
2 × (1.8
(0.12Ω + 0.13Ω)
×
1.2V(1− 0.249)
106Hz) × (4.7 ×10−6
1− 0.249
H
×
0.8)
2 × (1.8 ×106Hz) × (4.7 ×10−6 H × 0.8)
= 0.482A
Figure 10. Step-Down Converter Maximum Output Current Example
Linear Regulators (REG4, REG5)
The REG4 and REG5 linear regulators have low quies-
cent current, and low output noise. Each regulator sup-
plies up to 180mA to its load. Bypass each LDO output
with a 2.2µF or greater capacitor to ground. If V4 or V5
is set to less than 1.5V, bypass the output with 3.3µF or
greater.
Each linear regulator has an independent power input
(PV4 and PV5) with an input voltage range from 1.7V to
VSYS (VSYS can be up to 5.5V). Voltages below the
input undervoltage lockout threshold (1.6V) are invalid.
The regulator inputs can be driven from an efficient
low-voltage source, such as a DC-DC output, to opti-
mize efficiency (see the following equation). Bypass
each LDO input with a 1µF or greater capacitor to
ground:
EfficiencyLDO
≈
VOUT
VIN
REG5 is intended to power the system USB transceiver
circuitry and is only active when USB power is avail-
able. REG4 is powered from the battery when power is
not available at DC or USB.
See the Enable/Disable (EN) and Sequencing section
for how to enable and disable the linear regulators.
When enabled, the linear regulators soft-start by ramp-
ing their outputs up to their target voltage in 3ms. Soft-
start limits the inrush current when the regulators are
enabled.
The MAX8671X uses external resistor-dividers to set
the LDO output voltages between 0.6V and VPV_. Use
at least 10µA of bias current in these dividers to ensure
no change in the stability of the closed-loop system. To
set the output voltage, select a value for the resistor
connected between FB_ and AGND (RFBL). The recom-
mended value is 60.4kΩ. Next, calculate the value of
the resistor connected from FB_ to the output (RFBH):
RFBH
= RFBL
×
⎛
⎝⎜
VOUT
0.6V
− 1⎞⎠⎟
For REG4, an external 0.01µF bypass capacitor from
BP to AGND in conjunction with a 150kΩ internal resis-
tor creates a 110Hz lowpass filter for noise reduction.
BP is a high-impedance node and requires a low-leak-
age capacitor. For example, a leakage of 40nA results
in a 1% error.
VL Linear Regulator
VL is the output of a 3.3V linear regulator that powers
MAX8671X internal circuitry. VL is internally powered
from the higher of USB or DC and automatically powers
up when either of these power inputs exceeds approxi-
mately 1.5V. When the higher of the DC and USB sup-
ply is between 1.5V and 3.3V, VL operates in dropout.
VL automatically powers down when both the USB and
DC power inputs are removed. Bypass VL to AGND
with a 0.1µF capacitor.
VL remains on even when USB and/or DC are in over-
voltage or undervoltage lockout, when SYS is in under-
voltage lockout, and also during thermal faults.
VL sources up to 3mA for external loads. If VL is not
used for external loads, the MAX8671X’s USB/DC cur-
rent limit guarantees compliance with the USB 2.0 input
current specifications. If VL is used for external loads,
USB/DC currents increase and might exceed the limits
outlined in the USB 2.0 specification. For example, if the
USB to SYS current is limited to 95mA and VL is sourc-
ing 3mA, IUSB is 98mA. Similarly, if the USB input is sus-
pended and VL is sourcing 3mA, IUSB is 3mA.
______________________________________________________________________________________ 35
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