CHA2069-QDG21 View Datasheet(PDF) - United Monolithic Semiconductors
Part Name
Description
MFG CO.
'CHA2069-QDG21' PDF : 18 Pages View PDF
18-30GHz Low Noise Amplifier
Definition of the Sij reference planes
The reference planes are defined from the
footprint
of
the
recommended
characterization board 95541 shown below.
The reference is the symmetrical axis of the
package. The input and output reference
planes are located at 3.18mm offset (input
wise and output wise respec.) from this axis.
Then, the given Sij incorporates this land
pattern.
CHA2069-QDG
3.18
3.18
Circuit Biasing options
This circuit is self-biased, and flexibility is provided by the access to number of pads. the
internal DC electrical schematic is given in order to use these pads in a safe way.
Vg1
Vg2
Vg3
Vd1,2,3
The two requirements are:
N°1: Not exceed Vds = 3.5Volt (internal Drain to S ource voltage).
N°2: Not biased in such a way that Vgs becomes posi tive. (Internal Gate to Source voltage)
We propose two standard biasing:
Low Noise and low consumption:
Vd = 4.5V and B, D, E grounded.
All the other pads non connected (NC).
Idd = 65mA & Pout-1dB = 10.5dBm Typical.
(Equivalent to B, C, D, E, F: non connected and Vd=4.5V; Vg1=Vg2=Vg3=+1.V).
Low Noise and higher output power
Vd = 4.5V and B, C, F grounded.
All the other pads non connected (NC).
Idd = 85mA & Pout-1dB = 13.5dBm Typical..
Ref. DSCHA2069QDG6332 - 28 Nov 06
11/18
Specifications subject to change without notice
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
Share Link: 
