CHV2270-98F View Datasheet(PDF) - United Monolithic Semiconductors
Part Name
Description
MFG CO.
CHV2270-98F
United Monolithic Semiconductors
'CHV2270-98F' PDF : 8 Pages View PDF
CHV2270
Typical Assembly and Bias Configuration
Ku-band HBT VCO
Prescaler line
>= 47pF
GND
>= 47pF
DC line
+V
>= 47pF
L_out
>= 47pF
µ-strip line
This drawing shows an example of assembly and bias configuration. All the transistors are internally
self-biased. Some external chip capacitors of at least 47pF are necessary for the positive supply
voltage. Pads to be power supplied are (VD1 xor VD2) and (VA1 xor VA2).
Prescaler outputs PRES4 and PRES64 must be AC coupled through an external serial capacitor taking
into account output frequency and internal impedance of 100Ω (Typically >120pF).
SET4 and SET64 bonding length to DC ground longer than 10mm must be compensated by
intermediate decoupling capacitor (Typically >120pF). Setting is done by DC load only.
For the RF pad the equivalent wire bonding inductance (diameter=25µm) have to be according to the
following recommendation:
Pin name
Equivalent inductance
Wire length (1)
RF
L_out < 0.3 nH
< 0.4 mm
(1) This value is the total length including the necessary loop from pad to pad.
Chip backside must be RF grounded.
Ref.: DSCHV22709030 -30 Jan 09
6/8
Specifications subject to change without notice
Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
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