CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
13.5 Low Count
Register Name: Low Count
I/O Index: 4h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Low Count
7:0
R/W:00000000
Register Per: socket
Register Compatibility Type: DMA
Bit 2
Bit 1
Bit 0
This register is used to form part of the count for DMA transfers.
Bits 7:0 — Low Count
This register corresponds to the Base and Current Word Count of the Intel 8237 register set. DMA
transfers are counted by transaction, not by byte, word, or doubleword. The count registers count
down from the programmed value to zero and then one more. When written, this register is the
total count of transactions plus one. When read, this register reflects the remaining transactions.
13.6 Mid Count
Register Name: Mid Count
I/O Index: 5h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mid Count
15:8
R/W:00000000
This register is used to form part of the count for DMA transfers.
Bits 7:0 — Mid Count
Register Per: socket
Register Compatibility Type: DMA
Bit 2
Bit 1
Bit 0
13.7 High Count
Register Name: High Count
I/O Index: 6h
Register Per: socket
Register Compatibility Type: DMA
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
High Count
23:16
R/W:00000000
This register is used to form part of the Count for DMA transfers when bit 3 of the DMA Slave
Configuration register is set. When that bit is not set, this register is not used.
Bits 7:0 — High Count
When enabled this register can be used to increase the total number of transfers above the original
64-Kbyte transfers of the original Intel 8237.
174
DMA OPERATION REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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