CL-PS7110 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PS7110' PDF : 82 Pages View PDF
CL-PS7110
Low-Power System-on-a-Chip
Synchronous serial interface end-of-transfer interrupt
(SSEOTI) 51
T
TC1 under-flow interrupt (TC1OI) 51
TC2 under-flow interrupt (TC2OI) 51
Timer Counter 1 (TC1) 44
Timer Counter 1 clock source (TC1S) 44
Timer Counter 2 (TC2M) 44
Timer Counter 2 clock source (TC2S) 44
U
UART framing error (FRMERR) 55
UART overrun error (OVERR) 55
UART parity error (PARERR) 55
UART receiver FIFO empty (URXFE) 46
UART transmit FIFO full (UTXFF) 46
UART transmitter busy (UBUSY) 46
V
Version ID (VERID) 47
Video buffer size 52
W
Wake-up direct read (WUDR) 46
Wake-up disable (WAKEDIS) 45
Wake-up on (WUON) 46
Watch dog expired interrupt (WEINT) 50
Word length enable (WRDLEN) 56
78
BIT INDEX
May 1997
DATA BOOK v1.5
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