CMX838 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX838' PDF : 71 Pages View PDF
FRS/PMR446/GMRS Family Radio Processor
CMX838
6.4.6 Powersave Functions
Independent powersave control is provided for groups of CMX838 functions to support power management
schemes. The scope of each powersave control is somewhat independent of the five functional sections of
the CMX838 to support practical operating scenarios as shown in Figure 41 below.
PS1
MICOUT 3
MICIN 4
-
+
Vbias
AUX I/O 2
PS4
RXIN 1
VDD
VDD 22
VSS 19
VSS
VBIAS 26
XTAL 12
XTAL 13
Bias
REFIN 11
+RFIN 9
+
-RFIN 8
-
preemph
PS2
BOUT AOUT
27 28
AIN
BIN
25 24
HPF
PS3
deemph
LIM
LPF
voltage ref
LPF
Vbias
BPF
LPF
CTCSS encode
audio tone encode
1
0
CTCSS decoders
voltage
ref
RX Notone / TX Duration
timer
+
Vbias
Vbias
Vbias
0°/180°
phase
0°/180°
phase
CBUS
serial
interface
Baseband timing generation
divide
32/33
12 bit programmable
reference counter
programmable divider
phase
detect
lock
detect
voltage ref
charge
pump
SVDD
SVSS
s
PS5
PS1 = Register $83, bits 7-6
PS2 = Register $83, bits 5-4
PS3 = Register $83, bits 3-2
PS4 = Register $93, bits 7-6
PS5 = Register $89, bit 6
PS6 = Register $8A, bits 7-6
PS6
Figure 41: Powersave Scope and Related Control Registers
RXOUT 23
TXMOD1 21
TXMOD2 20
IRQ 15
RPLY DATA 16
CMD DATA 17
SERIAL CLOCK 18
CS 14
SVDD 7
SVSS 10
CPOUT 5
ISET 6
6.5 Control Registers Illustrated
This section illustrates the associations between some control register bit fields and corresponding CMX838
function blocks for quick reference. For detailed descriptions and definitions of C-BUS transactions and
registers, see Section 5.1.
Synthesizer & Baseband
Clock Control,
Address $89
76543210
XTAL 12
XTAL 13
Baseband timing generation
REFIN 11
+RFIN 9
+
-RFIN 8
-
divide
32/33
12 bit programmable
reference counter
programmable divider
phase
detect
Figure 42: Synthesizer to Baseband Clock Control, $89
2003 CML Microsystems Plc
55
D/838/8
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