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CMX838 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
CMX838
CML
CML Microsystems Plc CML
'CMX838' PDF : 71 Pages View PDF
FRS/PMR446/GMRS Family Radio Processor
CMX838
6.6 Application Examples
This section includes application examples in the form of ordered C-BUS register lists. When listed, the
register must be read or written to according to its defined type.
6.6.1 CMX838 Initialization
The CMX838’s many sections and functions must be initialized in proper sequence before they can be
operated. This example describes an initialization routine that may be used to configure the device for:
Baseband clock generation from RF synthesizer clock
Device digitally controlled amplifiers (DCA) set to normal power operation
Filters and deviation limiter set for normal power consumption
Synthesizer enabled and set to FRS channels
Subaudio section memory cleared and ready for configuration data
6.6.1.1 Register Descriptions:
GENERAL RESET ($01)
SYNTHESIZER BASEBAND CLOCK CONTROL ($89): 10010000b = $90
baseband and synthesizer reference clock from REF IN, xtal amp disabled (10)
REF IN frequency 12.8MHz (0100)
Bits 1-0 are don’t cares as xtal is not used
AUDIO POWER AND BANDWIDTH CONTROL ($83): 01010100b = $54
Modulation digitally controlled amplifiers (DCA) and microphone amplifier configured for normal
operation (01)
Audio filters, deviation limiter, and audio level DCA configured for normal operation (01)
De-emphasis network and Rx Audio Out DCA configured for normal operation (01)
Post deviation limiter LPF set to wide setting (0)
Bit 0 is unused (0)
SYNTHESIZER GENERAL CONTROL ($8A): 01010100b = $54
Synthesizer is enabled (01)
Lock detect IRQ is enabled, status updated every phase comparison when the last two comparisons
disagree (01)
Magnitude of charge pump current is 40*Iset (0)
Positive VCO gain slope (1)
FRS channels selected (00)
TONE SIGNALING CONTROL ($93): 01001111b = $4F
Enable power (01)
No IRQ (00)
Subaudio processor ‘soft reset’ (1111)
NOTE: Once the subaudio processor is in the ‘soft reset’ mode, any further tasks that are issued to the
subaudio processor will cause it to enter the ‘fast initialization’ mode. In this mode, the tone detectors and
encoders do not run. In order to resume normal operation from this ‘fast initialization’ mode, a task of $0 must
be written to the TONE SIGNALING CONTROL register ($93).
6.6.2 TX, subaudio encoding, single point modulation
This TX scenario configures the CMX838 as shown in Figure 47, for:
Baseband clock generation from RF synthesizer clock
input from microphone
internal pre-emphasis
HPF used
Limiter/LPF used
De-emphasis bypassed (this configuration will not allow Tx tone to be heard at speaker)
CTCSS encoder enabled
Audio + subaudio tones summed and presented at TX MOD 1 (TX MOD 2 set to Vbias)
2003 CML Microsystems Plc
58
D/838/8
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