CS5373A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS5373A' PDF : 40 Pages View PDF
CS5373A
VA+
0.1µF
0.1µF
VA+
2.5 V
VREF
VA-
INPUT FROM
CS3301A
CS3302A
AMPLIFIER
SENSOR
TEST OUTPUT
ELECTRONICS
TEST OUTPUT
10 Ω
100µF +
10nF
C0G
Route BUF as diff pair
Route OUT as diff pair
Route VREF as diff pair
VA+
VD
CAP+
CAP-
BUF+
MODE0
BUF-
MODE1
MODE2
OUT+
ATT0
OUT-
ATT1
CS5373A ATT2
VREF+
VREF-
TDATA
680 Ω
680 Ω
680 Ω
680 Ω
*Populate with 2 x 10nF or
1 x 22nF C0G or better.
20nF*
C0G
20nF*
C0G
INR+
INF+
INF-
INR-
VA-
MCLK
MSYNC
MDATA
MFLAG
GND
VA-
0.1µF
VD
CS5378
SIGNALS
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
TBSDATA
MCLK
MSYNC
MDATA
MFLAG
Figure 14. Analog Signals
7. ANALOG SIGNALS
The CS5373A has multiple differential analog
inputs and outputs. The modulator analog in-
puts are separated into rough and fine charge
differential pairs (INR±, INF±) for maximum
sampling accuracy. Both sets of modulator in-
puts require a simple differential anti-alias RC
filter to ensure high-frequency signals do not
alias into the measurement bandwidth.
The test DAC has a precision differential out-
put (OUT±) that provides the best analog per-
formance, but with only minimal drive
capability. A buffered output (BUF±) can drive
an external load, but with reduced analog per-
formance. Finally, the test DAC internal anti-
alias filter requires a dedicated capacitor con-
nection (CAP±) to eliminate undesired high-
frequency signals.
7.1 INR±, INF± Modulator Inputs
The modulator analog inputs are separated
into differential rough and fine signals (INR±,
INF±). The positive half of the differential input
signal is connected to INR+ and INF+, while
the negative half is attached to INF- and INR-.
The INR± pins are switched-capacitor ‘rough
charge’ inputs that pre-charge the internal an-
alog sampling capacitor before it is connected
to the INF± fine input pins.
7.1.1 Modulator Input Impedance
The modulator input has a dynamic switched-
capacitor architecture and so has a rough
charge input impedance that is inversely pro-
portional to the input master clock frequency
and the input capacitor size, [1 / (f * C)].
• MCLK = 2.048 MHz
• INR± Input Cap = 20 pF
• Impedance = [1 / (2.048 MHz * 20 pF)] = 24 kΩ.
Internal to the modulator, the rough inputs
(INR±) pre-charge the sampling capacitor
used by the fine inputs (INF±), therefore the in-
put current to the fine inputs is very low and the
effective input impedance is orders of magni-
tude above the impedance of the rough inputs.
7.1.2 Modulator Anti-alias Filter
The modulator inputs are required to be band-
width limited to ensure modulator loop stability
and prevent high-frequency signals from alias-
ing into the measurement band. The use of
simple single-pole differential low-pass RC fil-
ters across the INR± and INF± inputs ensures
high-frequency signals are rejected before
they can alias into the measurement band.
28
DS703F1
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