CS8900-CQ3 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS8900-CQ3' PDF : 138 Pages View PDF
CS8900A
Crystal LAN™ ISA Ethernet Controller
Host Enters Interrupt Routine
No
RxDMA
Frame
bit set?
Yes
Process other events
that caused interrupt
Read the DMA frame Count (CDMA)
(PacketPage base + 0028h)
Yes
CDMA
=0?
No
Process the
CDMA Frames
Process other events
that caused interrupt
Figure 25. RxDMA Only Operation
5.5.2 Configuring the CS8900A for Auto-Switch
DMA
Auto-Switch DMA mode requires the same config-
uration as Receive-DMA-only mode, with one ex-
ception: the AutoRxDMAE bit (Register 3,
RxCFG, Bit A) must be set, and the RxDMAonly
bit (Register 3, RxCFG, Bit 9) must be clear (see
Section 5.4 on page 89, Configuring the CS8900A
for DMA Operation). In Auto-Switch DMA mode,
the CS8900A operates in non-DMA mode if possi-
ble, only switching to slave DMA if necessary.
Note that if the AutoRxDMAE bit and the RxDM-
Aonly bit (Register 3, RxCFG, bit 9) are both set,
the CS8900A uses DMA for all receive frames.
5.5.3 Auto-Switch DMA Operation
Whenever a frame begins to be received in Auto-
Switch DMA mode, the CS8900A checks to see if
there is enough on-chip buffer space to store a max-
imum length frame. If there is, the incoming frame
is pre-processed and buffered as normal. If there
isn’t, the CS8900A’s MAC engine compares the
frame’s Destination Address (DA) to the criteria
programmed into the DA filter. If the incoming DA
fails the DA filter, the frame is discarded. If the DA
passes the DA filter, the CS8900A automatically
switches to DMA mode and starts transferring the
frame(s) currently being held in the on-chip buffer
into host memory. This frees up buffer space for the
incoming frame.
CIRRUS LOGIC PRODUCT DATASHEET
DS271PP4
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