CS8920A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS8920A' PDF : 144 Pages View PDF
CS8920A
alignment. These "holes" may be 1, 2, or 3 bytes,
depending on the length of the frame preceding
the hole.
5.5.7 RxDMAFrame Bit
The RxDMAFrame bit (Register C, BufEvent,
bit 7) is controlled by the CS8920A and is set
whenever the value in the DMA Frame Count
register is non-zero. The host cannot clear
RxDMAFrame by reading the BufEvent register
(Register C). Table 5.9 summarizes the criteria
used to set and clear RxDMAFrame.
5.5.8 Receive DMA Example Without
Wrap-Around
Figure 5.6 shows three frames stored in host
memory by DMA without wrap-around.
DMA Buffer
Base Address
RxStatus - Frame 1
RxLength - Frame 1
Frame 1
DMA Byte Count
(PacketPage base + 002Ah)
"Holes" due to
double-word
alignment
RxStatus - Frame 2
RxLength - Frame 2
Frame 2
RxStatus - Frame 3
RxLength - Frame 3
DMA Start-of-Frame
register (PacketPage
base + 0026H)
points here.
Frame 3
Figure 5.6. Example of Frames Stored in DMA Buffer
DS238PP2
101
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