CS8920A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS8920A' PDF : 144 Pages View PDF
4.7 Address Filter Registers
CS8920A
Address Filter Register:
Logical Address Filter (hash table) (Read//Write)
Address: PacketPage base + 0150h
Address 0157h Address 0156h Address 0155h Address 0154h Address 0153h Address 0152h Address 0151h Address 0150h
Most-
significant
byte of hash
filter.
Least-
significant
byte of hash
filter.
The CS8920A hashing decoder circuitry compares its output with one bit of the Logical Address Filter Register. If
the decoder output and the Logical Address Filter bit match, the frame passes the hash filter and the Hashed bit
(Register 4, RxEvent, Bit 9) is set. See Section 5.3.
This register’s initial state after reset is:
0000 0000 0000 0000 0000 0000 0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
Address Filter Register:
Individual Address (IEEE address) (Read//Write)
Address 0015Dh Address 0015Ch Address 0015Bh
Octet 5 of IA
Address: PacketPage base + 0158h
Address 0015Ah
Address 0159h
Address 00158h
Octet 0 of IA.
The unique, IEEE 48-bit Individual Address (IA) begins at 0158h. The first bit of the IA (Bit IA[00]) must be 0.
See Section 5.3.
The value of this register must be loaded from external storage, for example, from the EEPROM. See Section
3.3. If the CS8920A is not able to load the IA from the EEPROM, after a reset this register is undefined, and the
driver must write an address to this register.
74
DS238PP2
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